Principles
Technology
Hardware Systems
Software Systems
Intelligence Systems
Financial Systems
More than 5 year experience in Hardware and Software Systems
Integrated Circuits (ASIC & FPGA) described in VHDL & Verilog; verified and synthesized with open source tools; and printed with open standard cells.
Printed Circuits Boards drawn, printed, verified and tested with open source tools.
Hardware Systems
A Multi-Processor System on Chip (MPSoC) is a System on Chip (SoC) which includes multiple Processing Units (PU). As such, it is a Multi-Core System-on-Chip. All PUs are linked to each other by a Network on Chip (NoC). These technologies meet the performance needs of multimedia applications, telecommunication architectures or network security.
OVERVIEW
1. INTRODUCTION
2. PROJECTS
2.1. Processing Unit
2.1.1. RISC-V PU
2.1.2. OpenRISC PU
2.1.3. MSP430 PU
2.2. Multi-Processor System on Chip
2.2.1. RISC-V MPSoC
2.2.2. OpenRISC MPSoC
2.2.3. MSP430 MPSoC
3. WORKFLOW
3.1. Front-End Tools
3.2. Back-End Tools
4. CONCLUSION
WORKFLOW for a MPSoC
Software Systems
OVERVIEW
1. INTRODUCTION
2. PROJECTS
2.1. Multi-Processor System on Chip
2.1.1. RISC-V MPSoC
2.1.2. OpenRISC MPSoC
2.1.3. MSP430 MPSoC
2.2. Real Time Operating System
2.2.1. GNU Mach Kernel RTOS
2.2.2. GNU Hurd Operating System RTOS
2.2.3. GNU Debian Distribution RTOS
3. WORKFLOW
3.1. Front-End Tools
3.2. Back-End Tools
4. CONCLUSION
WORKFLOW for a RTOS in a MPSoC
Intelligence Systems
OVERVIEW
1. INTRODUCTION
2. PROJECTS
2.1. Real Time Operating System
2.1.1. GNU Mach Kernel RTOS
2.1.2. GNU Hurd Operating System RTOS
2.1.3. GNU Debian Distribution RTOS
2.2. Neural Turing Machine
2.2.1. PU-NTM
2.2.2. SoC-NTM
2.2.3. MPSoC-NTM
3. WORKFLOW
3.1. Front-End Tools
3.2. Back-End Tools
4. CONCLUSION
WORKFLOW for a NTM in a MPSoC
Financial Systems
An Automatic Financial Method (AFM) is the technology and innovation that aims to compete with Traditional Financial Methods in the delivery of financial services. It is an emerging industry that uses technology to improve activities in finance. AFM is the new applications, processes, products, or business models in the financial services industry, composed of complementary financial services and provided as an end-to-end process via the Internet.
OVERVIEW
1. INTRODUCTION
2. PROJECTS
2.1. Neural Turing Machine
2.1.1. PU-NTM
2.1.2. SoC-NTM
2.1.3. MPSoC-NTM
2.2. Financial Technology
2.2.1. PU-FinTech
2.2.2. SoC-FinTech
2.2.3. MPSoC-FinTech
3. WORKFLOW
3.1. Front-End Tools
3.2. Back-End Tools
4. CONCLUSION
WORKFLOW for an AFM in a MPSoC
Cores Inside QueenField Devices
Open ISA RISC-V
The RISC-V implementation has a 32/64/128 bit Microarchitecture, 6 stages data pipeline and an Instruction Set Architecture based on Reduced Instruction Set Computer. Compatible with AMBA and Wishbone Buses. For Researching and Developing.
Open ISA OpenRISC
The OpenRISC implementation has a 32/64 bit Microarchitecture, 5 stages data pipeline and an Instruction Set Architecture based on Reduced Instruction Set Computer. Compatible with Wishbone Bus. Only For Researching.
Open ISA MSP430
The MSP430 implementation has a 16 bit Microarchitecture, 3 stages data pipeline and an Instruction Set Architecture based on Reduced Instruction Set Computer. Compatible with Wishbone Bus. Only For Researching.
